FLIPSKY 4.20, A Explanation to the mystery, and how to stop the cutouts entirely!

meh you will get the hang of it with some practice. If an idiot like me can do it and anyone could :smiley:

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oki you convinced me :grin: just freaking order 100pcs for 0.16 cents too expensive! :rofl: I thought already retired doing soldering and fixing a circuit board. :grinning:

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y it won’t really brake the bank :joy:

So Flipsky has informed us that they have sent the proposed changes to their test engineer, and hope to test them in the coming weeks. They want to make sure that the proposed solution works with problems and will take the necessary steps to ensure thorough testing. Not sure how long it will take, but they have something is in the works.

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Don’t Flipsky use that same mosfet on all their vesc boards?

And by cutout do you mean over current fault? Or drv uvlo?

no, some versions use the NTMFS5C612NL instead of the NTMFS5C628NL.

The former has a 1.5 mohm rdson and 25 nC switching charge; the latter has a 2.4mohm rdson and 10nC of switching charge. The latter has a better figure of merit and is thus better suited for parallelism.

The cutouts we are referring to is what the VESC sees as a “DRV Fault”.

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Thanks for this! Awesome work guys, hopefully 10s of vescs will come back to life! :smile: #swedpower :smiley:

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And I have to do this for not just 1 resistor but 6?? I am 99.99% sure I will screw this up and end up with a dead VESC… :sweat_smile:

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Well you probably need to do so for 12 of them if you have a dual unit :joy: Honestly, sure it is fiddly and they resistors are very tiny, but grab a scrap pcb that you dont care about and mess around with it, you will very quickly get the hang of it. Do some research on the side and you are good to go. never said it was super easy but very much possible to do and you need to mess up pretty bad in order to kill the thing. you need to use fairly good tools though, a soldering iron that is oxidized and skipping the flux and things like that is just never going to work. :v:

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I have two of these VESCs and will try this asap! Been having the same problem so lets hope this fixes it :smiley:

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So Flipsky got back to us and said their initial tests were successful, and that they will be moving forward with implementing the change on all of their 4.20 FSESC hardware versions.

They say they have been very busy recently, but Schtekarsten and I will see if we can negotiate with them to offer to replace the resistors on existing 4.20 hardware versions.

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This is clutch

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Yup, and it’s such a classic “everyone wins” scenario. Love this aspect of the forum, and guys like @Schtekarsten and @Gamer43 who offer this kind of help.

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Just to add on gamers post. They said that they have successfully tested out the resistor modification and that they will from tomorrow and onwards ship the new 4.20 based vescs with the modified resistors. They are just mega busy moving their factory to another location that they have not yet “officially” released the changes.

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Just to be clear, does this mean that the new 4.20 will be able to handle 12s without issues or should we still be cautious?

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Yes! By all means go wild! Foc works too without any issues.

Well the cutouts have never been about the voltage to be honest!

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I guess we can say that after the resistor change, the FSESC 4.20 is probably one of the best VESC4 hardware variants available, especially at its price point, heatsink, and form factor.

12S FOC 60A, full throttle no problems. Hard to beat.

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Does the deadtime requirement not change with the higher gate resistance? Shouldnt we change the DT setting from 360ns or whatever to 400 something? Does the 4.2 drv have auto deadtime control?

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Interesting! I am not sure if the firmware automatically calculates that or not. Unfortunately im away for a few days so I can’t test that right now. I have not noticed anything wired regarding the startup though so who knows. Maybe someone with more knowledge regarding the software or electronics in general can answer that question. :woman_shrugging::dancer:

No, you cannot modify the dead time insertion on the VESC. It is more than sufficient (360nS). The dead time compensation in VESC tool is for the FOC algorithm, but for whatever reason, using the correct values actually introduces bugs.

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