The Sparkling switch

Yesterday I introduced theEscalate in this thread and among the upgrades I want to introduce there is a reliable anti-spark switch. This thing is well know to have a high failure rate so I though it was better to overkill the design.

These are features that I want in it. All of them are all already implemented in the schematics.

  1. short press for turn on, longer press for turn off

  2. reverse polarity protection :you plug black on red and nothing happens to the switch

  3. overvoltage transitiens protection: if voltage reaches high spikes, for example 100v spikes on a 60v preset maximum, then the switch will clamp the voltage to 60v dissipating excessive energy within the mosfets 4)overcurrent protection/ efuse: if the preset current limit is exceeded for more than a preset time, then the gate closes. This feature can be used as a fuse if the preset time is very short (<1ms)

  4. inrush limiting (this was already done within the vedder switch): the charge pump will slowly turn the mosfets, safely charging capacitive loads (vesc caps)

  5. superlow shutdown compsumpion: the ic draws 7uA (0.000007 amps)

  6. high current capability

  7. Cost very close to Vedder antispark: the ic I choose costs 2eu at quantity 1.

I will draw the pcbs hopefully this summer, but given the simplicity of the schematics anyone can do it on his own.


I think feature number 1 is really good. When I made the switch myself it shuts off the board due to vibration trigers the switch.

but number 2 feature, does it not affect the regen feature?

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I explained mysef wrong: the SWITCH circuits does not get damaged when reverse polarity is applied. Reverse polarity is when VCC<VOUT (see schematics)

ah ha! got it. sounds very robust. I really like feature 3 as well. voltage spike seems to break many switches.

What happens if you put a 22mF load on it at 42V? What part will be stressed the most?

Nice design, just one problem lt4356-1 will shutdown every time you will plug in VESC it will trigger overcurrent as high capacitive loads from capacitors inside will surge current ~100-500A That’s where you get that spark. I tried similar chip in my design research it was constantly turning off because of overcurrent :slight_smile:


The absence of C1 would certainly determine a huge inrush current; this is because the gate capacitance of mosfets is very low (nC) and the charging current high quite high (mA).

With the presence of C1, mosfets gates get charged slower (as slow as you want), thus they have very high resistance for a longer time, thus inrush current does not reach critical value.

The datasheet provides a formula to calculate how much capacitance is needed to avoid high inrush currents: lt43562%20lt4356

BTW I have just started learning electronics so what I say may not be 100% correct. Appreciate any hint @Kug3lis

See my answer above: if you have 22mF (20 vescs) and want a max of (example) 2A inrush current, you put this value in the formula and find the best C1 for your needs.

Edit 2 vescs (2*680uf) --> 20 vescs

This type of circuit generates a ramp for the gate voltage which causes the output voltage to ramp. This limits inrush current due to capacitive loads. But there is a down side, while the voltage is ramping the MOSFET is operating in linear mode and subjected to stress of V*I. So half through the ramp for e.g. limited to 20A ramp up current in that time MOSFET will be dissipating 25V * 20A = 500W of energy. So it can really easily exceed SOA (Safe operating area) in MOSFET at that Vds which specifies how much current and how long it can withstand at specific Vds. So it will blow through the MOSFET :slight_smile: For e.g. some MOSFET’s cant handle 20A at 30V for more than 50ms

This is theories I learned myself while designing and working on my Anti-Spark switch :slight_smile:

The best design would be similar to @jtag BMS with pre-charge circuit which pre-loads circuit with low current and then opens main gates :slight_smile:

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Two HW4.12 ESCs is more like 4mF. (680μF x 3 x 2)

I mean a huge capacitive load like 22mF

Fixed it. I haven’t made one yet. But it would be interesting to see.

As @Kug3lis says, any quantity of energy required to charge capacitive loads needs to pass through the mosfets. So generally speaking you would need to see how much avalanche energy a single mosfet is capable of handling; then you would calculate how much avalanche energy your capacitive load generates; this way you’d know how many mosfets are needed to cope with your particular inrush current.

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Why not go for a similar FET as the fatboy one? Looks like the single but powerful fet works quite well.

Yes its possible as its SOA is pretty big :wink: But don’t forget for high constant (>50A) currents you need cooling. It has higher internal resistance compared to smaller friends :slight_smile:

The thing is IF this layout is capable of coping with the inrush currents, then the big boy mosfet is not needed.

Since the chip that I selected is specifically designed to manage inrush currents, I believe that the effect @Kug3lis is predicting will not happen as long as you follow the manufacturer reccomendations (which is adding the ramping up cap C1). Real world testing will have the final word on this. If the six mos I choose fail, then an industrial mos should be choosen OR a buck converter must be added to replicate the precharge circuit of diebiems.

Now the comparison in terms of cost and heat generated: SOA mosfet: I believe is around 15eu, not sure though 6 NTMFS5C628NLT1G are about 6 eu at quantity 1000

6 NTMFS5C628NLT1G have 0.4mohm rdson (combined) so when 100amps are travelling through them, only 4 watts are dissipated

Then it’s fully opened. When it’s partially (charging gate capacitance it works in linear mode V*I) so 50V * 100A = 50000W) check

As this works as a high side switch gate voltage is Vds + Vgate so around 60-65V depends on IC Vg voltage.

So while Cgate chargers resistance will be huge inside mosfet. Look at the graph (those voltages are Vds + as its working in high side switch) so at 52V (Vds 50V) its resistance is 9mΩ so at like Vgate 10-20V it will be like 20-50mΩ


Even our big mosfets was blowing with long rising time so we have to find golden spot for enough current to not kill mosfet and enough time to not burnt it.

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I believe @Maxid wanted a comparison at normal operating condition (gate at 12v)

Definitely agree. Real world testing is a must to understand if the design is capable or not to handle specs.

62V :smiley:


lt4356 controls n-side mosfets and uses 12v charge pump at the gate. Edit: 12v respect to vcc.

High side switching mosfet gate voltage reference is Vds not 0V in case of low side that’s why you need charge pump to lift up your source voltage to Vds + Vgate voltage :wink:

Now let’s go back to the high-side drive. Let’s say you apply a voltage of 12V (with reference to ground) to the MOSFET gate. However, when the MOSFET is on, voltage at source is equal to +V. Let’s assume +V is +15V. Now the problem is +12V gate drive (with reference to ground) will not keep the MOSFET on. When the MOSFET is on, the MOSFET source will be at a potential of +15V. To be on, the MOSFET must have +8V VGS minimum. So, if source is at +15V, the voltage at the gate with respect to ground must be at least +23V. If source was at +300V, for example, gate drive would require a minimum of +308V with respect to ground. This is if the gate drive is referenced to ground. If you have a separate isolated power supply whose ground and the ground of the MOSFET-based circuit are isolated, then you can use that to drive the MOSFET as well.

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